WIN Semi announces linearity optimised GaN process Sep 16 Written By Jae Park The Taiwanese compound semiconductor foundry WIN Semiconductors has launched a 0.12 μm gate-length depletion-mode (D-mode) GaN HEMT technology on SiC substrates. Jae Park
WIN Semi announces linearity optimised GaN process Sep 16 Written By Jae Park The Taiwanese compound semiconductor foundry WIN Semiconductors has launched a 0.12 μm gate-length depletion-mode (D-mode) GaN HEMT technology on SiC substrates. Jae Park